Z80 cheat sheet

Z80 At a Glance

General Features

• Clock Speed: Ranges from 2.5 MHz to 6 MHz or higher, making it suitable for a variety of applications.
• Instruction Set: Rich with over 150 instructions, including extended instruction sets for enhanced performance.
• Addressing Modes: Supports multiple addressing modes (Immediate, Direct, Indexed, Register Indirect, etc.) for flexible data manipulation.

Registers

• General-Purpose Registers: 8-bit (A, B, C, D, E, H, L) and can be paired as 16-bit registers (BC, DE, HL) for operations.
• Special Registers: Include Accumulator (A), Flags register (F), Stack Pointer (SP), Program Counter (PC), two Index Registers (IX and IY), and Refresh Register (R).
• Shadow Registers: A set of alternate registers (A', B', C', D', E', H', L', and F') for rapid context switching, especially useful in interrupt handling.

Interrupt Handling

• Modes: Three interrupt modes (IM 0, IM 1, IM 2) providing versatility in response to external interrupts.
• Interrupt Vector Table: Used in IM 2 for indirect addressing of interrupt service routines, offering a more flexible interrupt handling mechanism.

Memory Management

• Memory Space: Addressable up to 64KB, with mechanisms for bank switching to extend beyond the 64KB limit in more advanced setups.
• Refresh Register (R): Ensures dynamic RAM refreshes, facilitating the use of less expensive DRAM.

Key Operations

• Bit Manipulation: Instructions for bit set, reset, and test operations directly on memory or registers.
• Block Operations: Support for block move, search, and I/O operations, enabling efficient data handling.

Registers

General-Purpose Registers

• A (Accumulator): Main register for arithmetic, logic, and data transfer operations.
• B, C, D, E, H, L: General-purpose registers, can be paired as BC, DE, HL for operations requiring 16-bit data or addresses.

Special-Purpose Registers

• PC (Program Counter): Holds the address of the next instruction to execute.
• SP (Stack Pointer): Points to the current top of the stack.
• IX, IY: Index registers for offset addressing modes.

Flag Register (F)

• Bit 7. S (Sign): Indicates the sign of the result of an operation.
• Bit 6. Z (Zero): Set if the result of an operation is zero.
• Bit 5. not used
• Bit 4. H (Half Carry): For BCD (Binary-Coded Decimal) operations.
• Bit 3. not used
• Bit 2. P/V (Parity/Overflow): Parity of the result or overflow.
• Bit 1. N (Subtract): Indicates subtraction.
• Bit 0. C (Carry): Set if the last operation resulted in a carry out or borrow into the high order bit.

Control and Status Registers

• I (Interrupt Vector): Holds the base address for interrupt vectoring.
• R (Memory Refresh): Used for dynamic memory refresh.

Shadow Registers

• Alternate Accumulator and Flags (A', F'): An alternate set of accumulator and flag registers, enabling quick context switches during interrupts.
• Alternate General-Purpose Registers (B', C', D', E', H', L'): A complementary set of registers for temporary storage during interrupt service routines or other critical operations, allowing the main program context to be preserved.
• Usage: Primarily used in interrupt service routines to save processing time by avoiding the need to save and restore the main registers.
• Switching Mechanism: The EXX and EX AF, AF' instructions are used to swap between the main and shadow register sets.

Addressing Modes

Immediate Addressing Mode

• Directly stores a byte into a register.
• LD A, #55h - Loads the hex value 55 into register A.

Immediate (Extended) Addressing Mode

• Similar to Immediate Mode but uses 16-bit data.
• LD HL, #1234h - Loads the hex value 1234 into HL register pair.

Modified Page Zero Addressing Mode

• Calls one of eight locations in page zero of memory.
• RST 00h - Calls the routine at address 0000h.

Relative Addressing Mode

• Jumps to a location relative to the current position.
• JR Z, label - Jumps to label if the Zero flag is set.

Extended Addressing Mode

• Uses a 16-bit address after the opcode.
• JP #1234h - Jumps to the address 1234h.

Indexed Addressing Mode

• Adds a displacement to IX or IY to access memory.
• LD A, (IX+#0Ah) - Loads A with the value at IX + 10.

Register Addressing Mode

• Operates directly on CPU registers.
• LD B, C - Loads register B with the value of register C.

Implied Addressing Mode

• Operations where the opcode implies the register.
• IN A, (C) - Reads from the port specified by C into A.

Register Indirect Addressing Mode

• Uses a register pair to point to a memory location.
• LD A, (HL) - Loads A with the value pointed to by HL.

Bit Addressing Mode

• Performs operations on specific bits.
• SET 2, (HL) - Sets the third bit of the byte pointed to by HL.

Load/Store Operations

• LD (rr),A - Load the 8 bit value in the Accumulator into the address in register rr. ('rr': BC DE HL IX+# IY SP)
• LD (HL),B - Load the 8 bit value in register r into the address in register rr.
• LD (addr),A - Load the 8 bit value in the Accumulator into memory address addr.
• LD (addr),rr - Load the 16 bit value in register pair rr into memory address addr.
• LD A,(rr) - Load the 8 bit value from the address in register rr into the Accumulator. ('rr': BC DE HL IX+# IY SP)
• LD A,(addr) - Load the 8 bit value from memory address addr into the Accumulator.
• LD r,# - Load the 8 bit register r with value #.
• LD A,I - Load the 8 bit value from the I register to the Accumulator.
• LD A,R - Load the 8 bit value from the R register to the Accumulator.
• LD rr,(addr) - Load the 16 bit register pair rr from memory address addr.
• LD rr,#### - Load the 16 bit register pair rr with immediate value ####
• LD I,A - Load the 8 bit value from the Accumulator into the I register.
• LD R,A - Load the R register with the 8 bit value in the Accumulator.
• LD SP,HL - Load the 16 bit Stack Pointer register SP with the value in HL.
• LD r1,r2 - Load the 8 bit register r1 from register r2.
• LD r,(rr) - Load the 8 bit register r from the address in register rr.

Only these two affect flag registers.

Block transfer

• LDI - Load and Increment (Load (HL) → (DE), then increment HL, DE, and decrement BC)
• LDIR - Load, Increment, and Repeat (Repeat LDI until BC = 0)
• LDD - Load and Decrement (Load (HL) → (DE), then decrement HL, DE, and decrement BC)
• LDDR - Load, Decrement, and Repeat (Repeat LDD until BC = 0)

Stack, Registers

• PUSH rr - Push Register Pair qq onto Stack (rr↓)
• POP rr - Pop Stack into Register Pair qq (rr↑)
• EX DE, HL' - Exchange HL and DE
• EX (SP),HL - Exchange HL with Top of Stack
• EX (SP),IX - Exchange IX with Top of Stack
• EX (SP),IY - Exchange IY with Top of Stack
• EX AF,AF' - Exchange the Accumulator and Flags with the shadow Accumulator and Flags
• EXX - Exchange BC, DE and HL with the shadow registers
• LD SP,HL - Load SP from HL
• LD SP,IX - Load SP from IX
• LD SP,IY - Load SP from IY

The Z80 does not directly manipulate processor status via the stack like the 6502's PHP or PLP. Instead, it focuses on efficient register pair manipulation, including the stack pointer (SP). The EX instructions involving (SP) offer unique ways to interact with the stack not seen in the 6502 architecture.

• All if AF / none

Arithmetic Instructions

Arithmetic operations on the Z80 microprocessor include a variety of instructions for adding, subtracting, incrementing, and decrementing, among others. Here are some of the key arithmetic instructions:

• ADC A, n - Add number to Accumulator with Carry (A + n + Carry → A)
• ADC r - Add register r to Accumulator with Carry (A + r + Carry → A)
• ADC HL, rr - Add 16 bit register rr to HL with Carry (HL + rr + Carry → HL)
• ADD A, n - Add number to Accumulator (A + n → A)
• ADD r - Add register r to Accumulator (A + r → A)
• ADD rr2 rr1 - Add 16 bit register rr1 to 16 bit register rr2 (rr1 + rr2 → rr2)
• SBC A, n - Subtract number from Accumulator with Borrow (A - n - Carry → A)
• SBC r - Subtract 8 bit number # and the carry from A (A - r - Carry → A)
• SBC HL, rr - Subtract 16 bit register rr and the carry from HL (HL - rr - Carry → HL)
• SUB n - Subtract register n from Accumulator (A - n → A)
• SUB r - Subtract number r from Accumulator (A - r → A)
• DAA - Decimal Adjust Accumulator (Binary Coded Decimal)
• DEC r - Decrement 8-bit Register (r - 1 → r)
• DEC r - Decrement 16-bit Register (rr - 1 → rr)
• INC r - Increment 8-bit Register (r + 1 → r)
• INC rr - Increment 16-bit Register (rr + 1 → rr)

Flags Affected

Shifts and Rotations

• RLC r - Rotate bits in register r Left and Copy the top bit to the Carry.
• RRC r - Rotate bits in register r Right and Copy the bottom bit to the Carry.
• RL r - Rotate bits in register r Left with Carry.
• RR r - Rotate bits in register r Right with carry.
• SLA r - Shift the bits register r Left for Arithmetic,
• SLL r - Shift the bits in register r Left Logically (for unsigned numbers).
• SRA r - Shift the bits in register r Right for Arithmetic.
• SRL r - Shift the bits in register r Right Logically.
• RLD - Rotate Left for binary coded Decimal
• RRD - Rotate Right for binary coded Decimal

Logical Operations

• AND r - Logical AND of bits in register r with Accumulator A. (A ∧ r → A)
• AND # - Logical AND of bits in 8 bit value # with Accumulator A (A ∧ # → A)
• CPL - Invert all bits of A (this is known as 'One's Complement').
• OR r - Logical OR of bits in register r with Accumulator A. (A ∨ r → A)
• OR # - Logical OR of bits in 8 bit value # with Accumulator A. (A ∨ # → A)
• XOR r - Exclusive OR of bits in register r with Accumulator A. (A ⊻ r → A)
• XOR # - Exclusive OR of bits in immediate value # with Accumulator A. (A ⊻ # → A)
• BIT b,r - Test bit b from 8 bit register r and set the Z flag to that bit.
• NEG - Negate the 8 bit value in the accumulator (Two's Complement of the number).
• RES b,r - Reset bit b from 8 bit register r to 0.

Compare Operations

• CP r - Compare the Accumulator to register r. ('r': (HL) (IX+#) (IY+#) A B C D E H L')
• CP # - Compare the Accumulator to 8 bit immediate value #. (#':0-255 ($00-$FF))
• CPD - Compare A to the byte at address HL and decrease HL and BC.
• CPDR - Compare A to the byte at address HL and Decrease and Repeat.
• CPI - Compare A to the byte at address HL and increase HL but decrease BC (Bytecount).
• CPIR - Compare A to the byte at addr HL and inc HL dec BC (Bytecount) and Rep until match or BC=0.

Jump / Subroutine

• CALL addr - Call Subroutine at address addr.
• CALL c, addr - Call Subroutine at address addr only IF condition c is true.
• DJNZ ofst - Decrease B and Jump if NonZero to address offset #.
• JP (HL) - Jump to the address in register HL.
• JP addr - Jump to the 16 bit address addr.
• JP c,addr - Jump to the 16 bit address addr only IF condition c is true in the flags register.
• JR ofst - Jump to the 8 bit offset #.
• JR c,ofst - Jump to the 8 bit offset ofst IF condition c is true.

Port Input / Output

• IN A,(#) - Read in an 8 bit byte A from 8 bit port #.
• IN r,(C) - Read in an 8 bit byte into register r from port (C).
• IND - Read a byte IN from port (C) and save to address in HL, then Decrease HL and B.
• INDR - Read a byte IN from port (C) and save to address in HL, then Decrease HL and B, rep until B=0.
• INI - Read a byte IN from port (C) and save to address in HL, then increase HL and decrease B.
• INIR - Read a byte IN from port (C) and save to the address in HL, inc HL and dec B, rep until B=0.
• OTDR - Out Decrement Repeat. Transfers B bytes from HL to port (C) moving downwards.
• OTIR - Out Increment Repeat. This command transfers B bytes from HL to port (C) moving upwards.
• OUT (#),A - Output an 8 bit byte from A to 8 bit port #.
• OUT (C),r - On a system with 8 bit ports, this will output an 8 bit byte from register r to port (C).
• OUT (C),0 - On a system with 8 bit ports, this will output an 8 bit byte zero to port (C).
• OUTD - Out and Decrement. This command transfers a byte from HL to port (C) moving downwards.
• OUTI - Out and Increment. This command transfers a byte from HL to port (C) moving upwards

Flags

• CCF - Complement Carry Flag (Inverts the C flag)
• SCF - Set Carry Flag (1 → C)
• DI - Disables maskable interrupts
• EI - Enables maskable interrupts
• HALT - Halt (Pauses CPU operation until an interrupt is received)

System Control

• RST - Restart (calls subroutine at fixed address)
• JP - Jump to New Location (16-bit address → PC)
• CALL - Call Subroutine (16-bit address → stack, then to PC)
• RET - Return from Subroutine (stack → PC)
• RET c - Return from a subroutine only if condition c is true (stack → PC)
• RETI - Return from an interrupt.
• RETN - Return from a non maskable interrupt (NMI).
• DI - Disable Interrupts (disables interrupt requests)
• EI - Enable Interrupts (enables interrupt requests)
• IM0 - Enable Interrupt mode 0.
• IM1 - Enable Interrupt mode 1.
• IM2 - Enable Interrupt mode 2.
• NOP - No Operation (does nothing, used for timing or program space padding)

General Tips

• Utilize Comments: Enhance code readability and maintenance by adding comments to explain the purpose of blocks of code or specific instructions.
• Flag Management: Pay close attention to the flag effects of instructions, especially the carry (C) and zero (Z) flags, as they are crucial for conditional branching and arithmetic operations.
• Leverage Stack Operations: Use stack instructions (PUSH, POP, etc.) to preserve and restore register states during subroutine calls. This is vital for managing data and return addresses.
• Optimize Data Access: Make effective use of the Indexed (IX, IY) and Register Indirect (HL, BC, DE) addressing modes for efficient data manipulation and access.
• Efficient Looping and Branching: Implement loops and conditional branches (JP, JR, CALL, RET with conditions) to control the flow of your program smartly. Utilize counter registers (BC, DE, HL) and flags for loop control.
• Use Interrupts Wisely: Understand and properly configure interrupt modes (IM 0, IM 1, IM 2) for responsive and efficient interrupt handling.
• Memory Management: Be aware of the Z80 memory layout and capabilities, including the use of shadow registers and the refresh register (R) for dynamic memory management.
• Optimization: Aim for code optimization by choosing the shortest or fastest instructions for a given task, considering the trade-offs between execution speed and program size.

Useful links

• Z80 CPU User Manual (pdf)
• Zilog Z80 CPU
• Z80 Flag Register
• Z80 opcode table